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High Accuracy, Ultralow IQ, 1 A, anyCAP(R) Low Dropout Regulator ADP3338 FEATURES High accuracy over line and load: 0.8% @ 25C, 1.4% over temperature Ultralow dropout voltage: 190 mV (typ) @ 1 A Requires only CO = 1.0 F for stability anyCAP = stable with any type of capacitor (including MLCC) Current and thermal limiting Low noise 2.7 V to 8 V supply range -40C to +85C ambient temperature range SOT-223 package IN THERMAL PROTECTION FUNCTIONAL BLOCK DIAGRAM Q1 OUT ADP3338 CC gm R1 DRIVER R2 02050-0-001 BANDGAP REF GND APPLICATIONS Notebook, palmtop computers SCSI terminators Battery-powered systems Bar code scanners Camcorders, cameras Home entertainment systems Networking systems DSP/ASIC supplies Figure 1. ADP3338 VIN 1F IN GND OUT VOUT 02050-0-002 1F Figure 2. Typical Application Circuit GENERAL DESCRIPTION The ADP3338 is a member of the ADP33xx family of precision, low dropout, anyCAP voltage regulators. The ADP3338 operates with an input voltage range of 2.7 V to 8 V and delivers a load current up to 1 A. The ADP3338 stands out from conventional LDOs with a novel architecture and an enhanced process that allows it to offer performance advantages and higher output current than its competition. Its patented design requires only a 1 F output capacitor for stability. This device is insensitive to output capacitor equivalent series resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications. The ADP3338 achieves exceptional accuracy of 0.8% at room temperature and 1.4% over temperature, line, and load variations. The dropout voltage of the ADP3338 is only 190 mV (typical) at 1 A. The device also includes a safety current limit and thermal overload protection. The ADP3338 has ultralow quiescent current: 110 A (typical) in light load situations. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. ADP3338 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 Typical Performance Characteristics ............................................. 6 Theory of Operation ........................................................................ 9 Application Information................................................................ 10 Capacitor Selection .................................................................... 10 Output Current Limit ................................................................ 10 Thermal Overload Protection .................................................. 10 Calculating Power Dissipation ................................................. 10 Printed Circuit Board Layout Considerations........................ 10 Outline Dimensions ....................................................................... 12 Ordering Guide .......................................................................... 12 REVISION HISTORY 6/04--Data Sheet Changed from Rev. 0 to Rev. A Updated Format..............................................................Universal Changes to Figures 5, 11, 12, 13, 14, 15 ...................................... 6 Updated Outline Dimensions ................................................... 12 Changes to Ordering Guide ...................................................... 12 6/01--Rev. 0: Initial Version Rev. A | Page 2 of 12 ADP3338 SPECIFICATIONS1, 2, 3 VIN = 6.0 V, CIN = COUT = 1 F, TJ = -40C to +125C, unless otherwise noted. Table 1. Parameter OUTPUT Voltage Accuracy Symbol VOUT Conditions VIN = VOUTNOM + 0.4 V to 8 V, IL = 0.1 mA to 1 A, TJ = 25C VIN = VOUTNOM + 0.4 V to 8 V, IL = 0.1 mA to 1 A, TJ = -40C to +125C VIN = VOUTNOM + 0.4 V to 8 V, IL = 50 mA to 1 A, TJ = 150C VIN = VOUTNOM + 0.4 V to 8 V, TJ = 25C IL = 0.1 mA to 1 A, TJ = 25C VOUT = 98% of VOUTNOM IL = 1 A IL = 500 mA IL = 100 mA VIN = VOUTNOM + 1 V f = 10 Hz-100 kHz, CL = 10 F, IL = 1 A IL = 1 A IL = 500 mA IL = 100 mA IL = 0.1 mA VIN = VOUTNOM - 100 mV, IL = 0.1 mA Min -0.8 -1.4 -1.6 0.04 0.006 190 125 70 1.6 95 9 4.5 0.9 110 190 400 200 150 Typ Max +0.8 +1.4 +1.6 Unit % % % mV/V mV/mA mV mV mV A V rms mA mA mA A A Line Regulation Load Regulation Dropout Voltage VDROP Peak Load Current Output Noise GROUND CURRENT In Regulation ILDPK VNOISE IGND In Dropout IGND 30 15 3 190 600 1 2 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods. Application stable with no load. 3 VIN = 2.7 V for models with VOUTNOM 2.2 V. Rev. A | Page 3 of 12 ADP3338 ABSOLUTE MAXIMUM RATINGS Unless otherwise specified, all voltages are referenced to GND. Table 2. Parameter Input Supply Voltage Power Dissipation Operating Ambient Temperature Range Operating Junction Temperature Range JA JC Storage Temperature Range Lead Temperature Range (Soldering 10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating -0.3 V to +8.5 V Internally Limited -40C to +85C -40C to +150C 62.3C/W 26.8C/W -65C to +150C 300C 215C 220C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 4 of 12 ADP3338 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 3 OUT NOTE: PIN 2 AND TAB ARE INTERNALLY CONNECTED Figure 3. 3-Lead SOT-223 Pin Configuration Table 3. Pin Function Descriptions Pin No. 1 2 3 Mnemonic GND OUT IN Function Ground Pin. Output of the Regulator. Bypass to Ground with a 1 F or larger capacitor. Regulator Input. Bypass to Ground with a 1 F or larger capacitor. Rev. A | Page 5 of 12 02050-0-003 OUT TOP VIEW (Not to Scale) 1 GND 2 ADP3338 IN ADP3338 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise noted. 2.515 VOUT = 2.5V 2.510 12 VOUT = 2.5V VIN = 6V 10 GROUND CURRENT (mA) IL = 0A OUTPUT VOLTAGE (V) 8 2.505 IL = 1A 2.500 IL = 0.5A 6 4 2.495 2 02050-0-004 2.490 2.5 4.5 INPUT VOLTAGE (V) 6.5 8.0 0 0 0.2 0.4 0.6 OUTPUT LOAD (A) 0.8 1.0 Figure 4. Line Regulation Output Voltage vs. Input Voltage 2.504 VIN = 6V 2.503 2.502 0.3 0.4 Figure 7. Ground Current vs. Load Current VOUT = 2.5V VIN = 6V IL = 1A IL = 0.7A OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (%) 2.501 2.500 2.499 2.498 2.497 2.496 02050-0-005 IL = 0.5A IL = 0.3A 0.2 0.1 IL = 0A 0 -0.05 -40 02050-0-008 02050-0-009 2.495 0 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 1.0 -20 0 20 40 60 80 JUNCTION TEMPERATURE (C) 100 120 Figure 5. Output Voltage vs. Load Current 300 VOUT = 2.5V ILOAD = 0A 250 Figure 8. Output Voltage Variation % vs. Junction Temperature 18 ILOAD = 1A 16 14 GROUND CURRENT (mA) GROUND CURRENT (A) ILOAD = 700mA ILOAD = 500mA ILOAD = 300mA 200 12 10 8 6 4 2 150 100 50 0 0 2 4 INPUT VOLTAGE (V) 6 8 02050-0-006 0 -40 -20 0 20 40 60 80 100 120 JUNCTION TEMPERATURE (C) 140 160 Figure 6. Ground Current vs. Supply Voltage Figure 9. Ground Current vs. Junction Temperature Rev. A | Page 6 of 12 02050-0-007 ADP3338 250 VOUT = 2.5V 2.51 VOUT = 2.5V COUT = 10F ILOAD = 1A 200 2.50 2.49 VOLTS 4.5 3.5 02050-0-013 DROPOUT (mV) 150 100 50 02050-0-010 0 0 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 1.0 40 80 120 140 TIME (s) 180 220 Figure 10. Dropout Voltage vs. Load Current Figure 13. Line Transient Response 3 INPUT/OUTPUT VOLTAGE (V) VOUT = 2.5V ILOAD = 1A 2.6 VIN = 6V COUT = 1F VOLTS 2.5 2.4 2 1 1 A 0 02050-0-011 0 02050-0-014 0 1 2 3 4 5 6 TIME (sec) 7 8 9 10 0 200 400 600 TIME (s) 800 1000 Figure 11. Power-Up/Power-Down Figure 14. Load Transient Response 2.51 2.50 2.49 VOLTS VOLTS VOUT = 2.5V COUT = 1F ILOAD = 1A 2.6 2.5 2.4 VIN = 6V COUT = 10F 1 4.5 A 3.5 02050-0-012 0 02050-0-015 40 80 120 140 TIME (s) 180 220 0 200 400 600 TIME (s) 800 1000 Figure 12. Line Transient Response Figure 15. Load Transient Response Rev. A | Page 7 of 12 ADP3338 300 VOLTS 2.5 250 0 FULL SHORT 1.5 A VIN = 6V 1.0 0.5 0 02050-0-016 RMS NOISE (V) 400m SHORT 200 150 IL = 1A 100 50 IL = 0A 0 0 10 0.4 0.6 0.8 1.0 TIME (s) 20 CL (F) 30 40 50 Figure 16. Short-Circuit Current VOLTAGE NOISE SPECTRAL DENSITY (V/ Hz) Figure 18. RMS Noise vs. CL (10 Hz to 100 kHz) 100 0 VOUT = 2.5V -10 -20 RIPPLE REJECTION (dB) CL = 1F IL = 1A CL = 10F IL = 1A 10 -30 -40 -50 -60 -70 -80 -90 1 CL = 1F 0.1 CL = 10F CL = 1F IL = 0 100 1k 10k FREQUENCY (Hz) CL = 10F IL = 0 02050-0-017 0.01 -100 10 100k 1M 0.001 10 100 10k 1k FREQUENCY (Hz) 100k 1M Figure 17. Power Supply Ripple Rejection Figure 19. Output Noise Density Rev. A | Page 8 of 12 02050-0-019 02050-0-018 ADP3338 THEORY OF OPERATION The ADP3338 anyCAP LDO uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider, consisting of R1 and R2, which is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that equilibrium produces a large, temperature-proportional input offset voltage that is repeatable and very well controlled. The temperatureproportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage that is implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the band gap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by diode D1 and a second divider consisting of R3 and R4, the values can be chosen to produce a temperaturestable output. This unique arrangement specifically corrects for the loading of the divider, thus avoiding the error resulting from base current loading in conventional circuits. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole-splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value required to keep conventional LDOs stable changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. With the ADP3338 anyCAP LDO, this is no longer true. It can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. This innovative design allows the circuit to be stable with just a small 1 F capacitor on the output. Additional advantages of the pole-splitting scheme include superior line noise rejection and very high regulator gain, which lead to excellent line and load regulation. An impressive 1.4% accuracy is guaranteed over line, load, and temperature. Additional features of the circuit include current limit and thermal shutdown. VIN C1 1F IN OUT GND C2 1F VOUT Figure 20. Typical Application Circuit INPUT Q1 COMPENSATION CAPACITOR PTAT VOS R4 OUTPUT ATTENUATION (VBANDGAP/VOUT) R3 D1 (a) PTAT CURRENT R1 CLOAD RLOAD R2 02050-0-020 NONINVERTING WIDEBAND DRIVER gm ADP3338 GND Figure 21. Functional Block Diagram Rev. A | Page 9 of 12 02050-0-021 ADP3338 ADP3338 APPLICATION INFORMATION CAPACITOR SELECTION Output Capacitor The stability and transient response of the LDO is a function of the output capacitor. The ADP3338 is stable with a wide range of capacitor values, types, and ESR (anyCAP). A capacitor as low as 1 F is all that is needed for stability. A higher capacitance may be necessary if high output current surges are anticipated, or if the output capacitor cannot be located near the output and ground pins. The ADP3338 is stable with extremely low ESR capacitors (ESR 0) such as multilayer ceramic capacitors (MLCC) or OSCON. Note that the effective capacitance of some capacitor types falls below the minimum over temperature or with dc voltage. CALCULATING POWER DISSIPATION Device power dissipation is calculated as follows: PD = (VIN - VOUT) x ILOAD + (VIN x IGND) Where ILOAD and IGND are load current and ground current, VIN and VOUT are the input and output voltages respectively. Assuming the worst-case operating conditions are ILOAD = 1.0 A, IGND = 10 mA, VIN = 3.3 V, and VOUT = 2.5 V, the device power dissipation is PD = (3.3 V - 2.5 V) x 1000 mA + (3.3 V x 10 mA) = 833 mW So, for a junction temperature of 125C and a maximum ambient temperature of 85C, the required thermal resistance from junction to ambient is Input Capacitor An input bypass capacitor is not strictly required but is recommended in any application involving long input wires or high source impedance. Connecting a 1 F capacitor from the input to ground reduces the circuit's sensitivity to PC board layout and input transients. If a larger output capacitor is necessary, a larger value input capacitor is also recommended. JA = 125C - 85C 0.833 W = 48C/W PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS The SOT-223's thermal resistance, JA, is determined by the sum of the junction-to-case and the case-to-ambient thermal resistances. The junction-to-case thermal resistance, JC, is determined by the package design and is specified at 26.8C/W. However, the case-to-ambient thermal resistance is determined by the printed circuit board design. As shown in Figure 22, the amount of copper to which the ADP3338 is mounted affects thermal performance. When mounted to the minimal pads of 2 oz. copper (Figure 22a), JA is 126.6C/W. Adding a small copper pad under the ADP3338 (Figure 22b) reduces the JA to 102.9C/W. Increasing the copper pad to 1 square inch (Figure 22c) reduces the JA even further to 52.8C/W. OUTPUT CURRENT LIMIT The ADP3338 is short-circuit protected by limiting the pass transistor's base drive current. The maximum output current is limited to about 2 A. See Figure 16. THERMAL OVERLOAD PROTECTION The ADP3338 is protected against damage due to excessive power dissipation by its thermal overload protection circuit. Thermal protection limits the die temperature to a maximum of 160C. Under extreme conditions (i.e., high ambient temperature and power dissipation) where the die temperature starts to rise above 160C, the output current is reduced until the die temperature has dropped to a safe level. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, the device's power dissipation should be externally limited so the junction temperature does not exceed 150C. a b c Figure 22. PCB Layouts Rev. A | Page 10 of 12 02050-0-0-022 ADP3338 Use the following general guidelines when designing printed circuit boards: 1. 2. 3. Keep the output capacitor as close to the output and ground pins as possible. Keep the input capacitor as close to the input and ground pins as possible. PC board traces with larger cross sectional areas remove more heat from the ADP3338. For optimum heat transfer, specify thick copper and use wide traces. The thermal resistance can be decreased by adding a copper pad under the ADP3338, as shown in Figure 22b. 6. 5. If possible, utilize the adjacent area to add more copper around the ADP3338. Connecting the copper area to the output of the ADP3338, as shown in Figure 22c, is best, but thermal performance will be improved even if it is connected to other signals. Use additional copper layers or planes to reduce the thermal resistance. Again, connecting the other layers to the output of the ADP3338 is best, but is not necessary. When connecting the output pad to other layers, use multiple vias. 4. Rev. A | Page 11 of 12 ADP3338 OUTLINE DIMENSIONS 3.15 3.00 2.90 3.50 BSC 1 2 3 7.00 BSC 0.85 0.70 0.60 2.30 BSC 1.05 0.85 1.30 1.10 16 10 0.35 0.26 0.24 10 MAX SEATING PLANE 16 10 1.70 1.50 6.50 BSC 0.10 0.02 4.60 BSC COMPLIANT TO JEDEC STANDARDS TO-261-AA Figure 23. 3-Lead Small Outline Transistor Package [SOT-223] (KC-3) Dimensions shown in millimeters ORDERING GUIDE Model ADP3338AKC-1.5-RL ADP3338AKC-1.5-RL7 ADP3338AKC-1.8-RL ADP3338AKC-1.8-RL7 ADP3338AKC-2.5-RL ADP3338AKC-2.5-RL7 ADP3338AKC-2.85-RL ADP3338AKC-2.85-RL7 ADP3338AKC-3-RL ADP3338AKC-3-RL7 ADP3338AKC-3.3-RL ADP3338AKC-3.3-RL7 ADP3338AKC-5-RL ADP3338AKC-5-RL7 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Output Voltage(V) 1.5 1.5 1.8 1.8 2.5 2.5 2.85 2.85 3.0 3.0 3.3 3.3 5 5 Package Option KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 KC-3 Package Description 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 3-Lead SOT-223 (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02050-0-6/04(A) Rev. A | Page 12 of 12 |
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